This is the SPARC-V8 ArchC 2.2 functional model. This model has the system call emulation functions implemented, so it is a good idea to turn on the ABI option. To use acsim, the interpreted simulator: acsim -abi (create the simulator) make -f Makefile.archc (compile) sparcv8.x --load= [args] (run an application) The [args] are optional arguments for the application. There are two formats recognized for application : - ELF binary matching ArchC specifications - hexadecimal text file for ArchC To generate binary utilities use: -i -a This will generate the tools source files using the architeture name (if omitted, sparcv8 is used), copy them to the binutils source tree, build and install them into the directory (which -must- be an absolute path). Use " -h" to get information about the command-line options available. For more information visit CHANGELOG: ========== Version 1.0.0: - ArchC 2.2 compliant Version 0.7.8: - Added binary utilities support files - ArchC 2.0 compliant Version 0.7.7-archc2.0beta3: - Fixed an annoying bug which caused a segfault on the fft program (MiBench) Version 0.7.6-archc2.0beta3: - Added license headers Version 0.7.5-archc2.0beta1: - Model compliant with ArchC 2.0beta1 Version 0.7.5: - Fixed 'unimplemented' instruction format and assembly syntax - Fixed bug in mulscc_reg and mulscc_imm instructions (condition codes) - npc initialization depends on ac_pc, so program can start at arbitrary address Version 0.7.4: - Included assembly language syntax information Version 0.7.3: - Fix bug in instruction MULSCC (used only for V7 multiplication) - New REGS register bank holds the current register window from RB - Use ArchC support for debug messages: ac_debug_model.H - Use operator[] syntax to read register banks, which is faster Version 0.7.2: - Included optimization instruction methods for compiled simulation - Separate nop instruction from sethi to optimize simulation Version 0.7.1: - Included file for GDB integration Version 0.7.0: - Model passed selected Mediabench and Mibench applications